/*
** Linker Script for 30f3013
*/

OUTPUT_ARCH("30f3013")
EXTERN(__resetPRI)
EXTERN(__resetALT)


/*
** Memory Regions
*/
MEMORY
{
  data  (a!xr) : ORIGIN = 0x800,    LENGTH = 2048
  program (xr) : ORIGIN = 0x100,    LENGTH = ((8K * 2) - 0x100)
  reset        : ORIGIN = 0,        LENGTH = (4)
  ivt          : ORIGIN = 0x04,     LENGTH = (62 * 2)
  aivt         : ORIGIN = 0x84,     LENGTH = (62 * 2)
  __FOSC       : ORIGIN = 0xF80000, LENGTH = (2)
  __FWDT       : ORIGIN = 0xF80002, LENGTH = (2)
  __FBORPOR    : ORIGIN = 0xF80004, LENGTH = (2)
  __CONFIG4    : ORIGIN = 0xF80006, LENGTH = (2)
  __CONFIG5    : ORIGIN = 0xF80008, LENGTH = (2)
  __FGS        : ORIGIN = 0xF8000A, LENGTH = (2)
  eedata       : ORIGIN = 0x7FFC00, LENGTH = (1024)
}
__NO_HANDLES = 1;          /* Suppress handles on this device  */


/*
** Base Memory Addresses - Program Memory
*/
__RESET_BASE  = 0;        /* Reset Instruction                */
__IVT_BASE    = 0x04;     /* Interrupt Vector Table           */
__AIVT_BASE   = 0x84;     /* Alternate Interrupt Vector Table */
__CODE_BASE   = 0x100;    /* Handles, User Code, Library Code */


/*
** Base Memory Addresses - Data Memory
*/
__SFR_BASE    = 0;        /* Memory-mapped SFRs                 */
__DATA_BASE   = 0x800;    /* X and General Purpose Data Memory  */
__YDATA_BASE  = 0x0C00;   /* Y Data Memory for DSP Instructions */


/*
** ==================== Section Map ======================
*/

SECTIONS
{

  /*
  ** ================== Program Memory =====================
  */

  /*
  ** Reset Instruction
  */
  .reset __RESET_BASE :
  {
        SHORT(ABSOLUTE(__reset));
        SHORT(0x04);
        SHORT((ABSOLUTE(__reset) >> 16) & 0x7F);
        SHORT(0);
  } >reset


  /*
  ** Interrupt Vector Tables
  **
  ** The primary and alternate tables are loaded
  ** here, between sections .reset and .text.
  ** Vector table source code appears below.
  */

  /*
  ** User Code and Library Code
  */
  .text __CODE_BASE :
  {
        *(.handle);
        *(.libc) *(.libm) *(.libdsp);  /* keep together in this order */
        *(.lib*);
        *(.text);
  } >program

  /*
  ** User-Defined Section in Program Memory
  **
  ** note: can specify an address using
  **       the following syntax:
  **
  **       usercode 0x1234 :
  **         {
  **           *(usercode);
  **         } >program
  */
  usercode :
  {
        *(usercode);
  } >program


  /*
  ** ================ Configuration Memory ================
  */


  /*
  ** Configuration Fuses
  */
  __FOSC :
  { *(__FOSC.sec)    } >__FOSC
  __FWDT :
  { *(__FWDT.sec)    } >__FWDT
  __FBORPOR :
  { *(__FBORPOR.sec) } >__FBORPOR
  __CONFIG4 :
  { *(__CONFIG4.sec) } >__CONFIG4
  __CONFIG5 :
  { *(__CONFIG5.sec) } >__CONFIG5
  __FGS :
  { *(__FGS.sec)     } >__FGS


  /*
  ** User-Defined Section in Data Flash Memory
  **
  ** note: can specify an address using
  **       the following syntax:
  **
  **       user_eedata 0x7FFC00 :
  **         {
  **           *(user_eedata);
  **         } >eedata
  */
  user_eedata :
  {
        *(user_eedata);
  } >eedata


  /*
  ** ==================== Data Memory ===================
  */

  /* 
  ** ICD Debug Exec
  **
  ** This section provides optional storage for
  ** the ICD2 debugger. Define a global symbol
  ** named __ICD2RAM to enable ICD2. This section
  ** must be loaded at data address 0x800.
  */ 
  .icd __DATA_BASE (NOLOAD): 
  { 
    . += (DEFINED (__ICD2RAM) ? 0x50 : 0 ); 
  } > data 


  /*
  ** User-Defined Section in Data Memory
  **
  ** note: can specify an address using
  **       the following syntax:
  **
  **       userdata 0x1234 :
  **         {
  **           *(userdata);
  **         } >data
  */
  userdata :
  {
        *(userdata);
  } >data


  /*
  ** ===================== Debug Info ====================
  */

  .comment        0 : { *(.comment) }

  /*
  ** DWARF-2
  */
  .debug_info     0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
  .debug_abbrev   0 : { *(.debug_abbrev) }
  .debug_line     0 : { *(.debug_line) }
  .debug_frame    0 : { *(.debug_frame) }
  .debug_str      0 : { *(.debug_str) }
  .debug_loc      0 : { *(.debug_loc) }
  .debug_macinfo  0 : { *(.debug_macinfo) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  .debug_ranges   0 : { *(.debug_ranges) }
  .debug_aranges  0 : { *(.debug_aranges) }

} /* SECTIONS */

/*
** ================= End of Section Map ================
*/
/*
** Section Map for Interrupt Vector Tables
*/
SECTIONS
{

/*
** Primary Interrupt Vector Table
*/
.ivt __IVT_BASE :
  {
    LONG(DEFINED(__ReservedTrap0
) ? ABSOLUTE(__ReservedTrap0
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__OscillatorFail
)? ABSOLUTE(__OscillatorFail
):
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__AddressError
)  ? ABSOLUTE(__AddressError
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__StackError
)    ? ABSOLUTE(__StackError
)    :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__MathError
)     ? ABSOLUTE(__MathError
)     :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__ReservedTrap5
) ? ABSOLUTE(__ReservedTrap5
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__ReservedTrap6
) ? ABSOLUTE(__ReservedTrap6
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__ReservedTrap7
) ? ABSOLUTE(__ReservedTrap7
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__INT0Interrupt
) ? ABSOLUTE(__INT0Interrupt
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__IC1Interrupt
)  ? ABSOLUTE(__IC1Interrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__OC1Interrupt
)  ? ABSOLUTE(__OC1Interrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__T1Interrupt
)   ? ABSOLUTE(__T1Interrupt
)   :
         ABSOLUTE(odtmr1));


    LONG(DEFINED(__IC2Interrupt
)  ? ABSOLUTE(__IC2Interrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__OC2Interrupt
)  ? ABSOLUTE(__OC2Interrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__T2Interrupt
)   ? ABSOLUTE(__T2Interrupt
)   :
         ABSOLUTE(odtmr2));



    LONG(DEFINED(__T3Interrupt
)   ? ABSOLUTE(__T3Interrupt
)   :
         ABSOLUTE(__DefaultInterrupt));



    LONG(DEFINED(__SPI1Interrupt
) ? ABSOLUTE(__SPI1Interrupt
) :
         ABSOLUTE(konecDA));



    LONG(DEFINED(__U1RXInterrupt
) ? ABSOLUTE(__U1RXInterrupt
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__U1TXInterrupt
) ? ABSOLUTE(__U1TXInterrupt
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__ADCInterrupt
)  ? ABSOLUTE(__ADCInterrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__NVMInterrupt
)  ? ABSOLUTE(__NVMInterrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__SI2CInterrupt
) ? ABSOLUTE(__SI2CInterrupt
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__MI2CInterrupt
) ? ABSOLUTE(__MI2CInterrupt
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__CNInterrupt
)   ? ABSOLUTE(__CNInterrupt
)   :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__INT1Interrupt
) ? ABSOLUTE(__INT1Interrupt
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__IC7Interrupt
)  ? ABSOLUTE(__IC7Interrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__IC8Interrupt
)  ? ABSOLUTE(__IC8Interrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__OC3Interrupt
)  ? ABSOLUTE(__OC3Interrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__OC4Interrupt
)  ? ABSOLUTE(__OC4Interrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__T4Interrupt
)   ? ABSOLUTE(__T4Interrupt
)   :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__T5Interrupt
)   ? ABSOLUTE(__T5Interrupt
)   :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__INT2Interrupt
) ? ABSOLUTE(__INT2Interrupt
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__U2RXInterrupt
) ? ABSOLUTE(__U2RXInterrupt
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__U2TXInterrupt
) ? ABSOLUTE(__U2TXInterrupt
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__SPI2Interrupt
) ? ABSOLUTE(__SPI2Interrupt
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__C1Interrupt
)   ? ABSOLUTE(__C1Interrupt
)   :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__IC3Interrupt
)  ? ABSOLUTE(__IC3Interrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__IC4Interrupt
)  ? ABSOLUTE(__IC4Interrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__IC5Interrupt
)  ? ABSOLUTE(__IC5Interrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__IC6Interrupt
)  ? ABSOLUTE(__IC6Interrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__OC5Interrupt
)  ? ABSOLUTE(__OC5Interrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__OC6Interrupt
)  ? ABSOLUTE(__OC6Interrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__OC7Interrupt
)  ? ABSOLUTE(__OC7Interrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__OC8Interrupt
)  ? ABSOLUTE(__OC8Interrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__INT3Interrupt
) ? ABSOLUTE(__INT3Interrupt
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__INT4Interrupt
) ? ABSOLUTE(__INT4Interrupt
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__C2Interrupt
)   ? ABSOLUTE(__C2Interrupt
)   :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__PWMInterrupt
)  ? ABSOLUTE(__PWMInterrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__QEIInterrupt
)  ? ABSOLUTE(__QEIInterrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__DCIInterrupt
)  ? ABSOLUTE(__DCIInterrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__LVDInterrupt
)  ? ABSOLUTE(__LVDInterrupt
)  :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__FLTAInterrupt
) ? ABSOLUTE(__FLTAInterrupt
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__FLTBInterrupt
) ? ABSOLUTE(__FLTBInterrupt
) :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__Interrupt45
)   ? ABSOLUTE(__Interrupt45
)   :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__Interrupt46
)   ? ABSOLUTE(__Interrupt46
)   :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__Interrupt47
)   ? ABSOLUTE(__Interrupt47
)   :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__Interrupt48
)   ? ABSOLUTE(__Interrupt48
)   :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__Interrupt49
)   ? ABSOLUTE(__Interrupt49
)   :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__Interrupt50
)   ? ABSOLUTE(__Interrupt50
)   :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__Interrupt51
)   ? ABSOLUTE(__Interrupt51
)   :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__Interrupt52
)   ? ABSOLUTE(__Interrupt52
)   :
         ABSOLUTE(__DefaultInterrupt));
    LONG(DEFINED(__Interrupt53
)   ? ABSOLUTE(__Interrupt53
)   :
         ABSOLUTE(__DefaultInterrupt));
  } >ivt


/*
** Alternate Interrupt Vector Table
*/
.aivt __AIVT_BASE :
  {
    LONG(DEFINED(__AltReservedTrap0
) ? ABSOLUTE(__AltReservedTrap0
) :
        (DEFINED(__ReservedTrap0
)    ? ABSOLUTE(__ReservedTrap0
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltOscillatorFail
)? ABSOLUTE(__AltOscillatorFail
):
        (DEFINED(__OscillatorFail
)   ? ABSOLUTE(__OscillatorFail
)   :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltAddressError
)  ? ABSOLUTE(__AltAddressError
)  :
        (DEFINED(__AddressError
)     ? ABSOLUTE(__AddressError
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltStackError
)    ? ABSOLUTE(__AltStackError
)    :
        (DEFINED(__StackError
)       ? ABSOLUTE(__StackError
)       :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltMathError
)     ? ABSOLUTE(__AltMathError
)     :
        (DEFINED(__MathError
)        ? ABSOLUTE(__MathError
)        :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltReservedTrap5
) ? ABSOLUTE(__AltReservedTrap5
) :
        (DEFINED(__ReservedTrap5
)    ? ABSOLUTE(__ReservedTrap5
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltReservedTrap6
) ? ABSOLUTE(__AltReservedTrap6
) :
        (DEFINED(__ReservedTrap6
)    ? ABSOLUTE(__ReservedTrap6
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltReservedTrap7
) ? ABSOLUTE(__AltReservedTrap7
) :
        (DEFINED(__ReservedTrap7
)    ? ABSOLUTE(__ReservedTrap7
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltINT0Interrupt
) ? ABSOLUTE(__AltINT0Interrupt
) :
        (DEFINED(__INT0Interrupt
)    ? ABSOLUTE(__INT0Interrupt
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltIC1Interrupt
)  ? ABSOLUTE(__AltIC1Interrupt
)  :
        (DEFINED(__IC1Interrupt
)     ? ABSOLUTE(__IC1Interrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltOC1Interrupt
)  ? ABSOLUTE(__AltOC1Interrupt
)  :
        (DEFINED(__OC1Interrupt
)     ? ABSOLUTE(__OC1Interrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltT1Interrupt
)   ? ABSOLUTE(__AltT1Interrupt
)   :
        (DEFINED(__T1Interrupt
)      ? ABSOLUTE(__T1Interrupt
)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltIC2Interrupt
)  ? ABSOLUTE(__AltIC2Interrupt
)  :
        (DEFINED(__IC2Interrupt
)     ? ABSOLUTE(__IC2Interrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltOC2Interrupt
)  ? ABSOLUTE(__AltOC2Interrupt
)  :
        (DEFINED(__OC2Interrupt
)     ? ABSOLUTE(__OC2Interrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltT2Interrupt
)   ? ABSOLUTE(__AltT2Interrupt
)   :
        (DEFINED(__T2Interrupt
)      ? ABSOLUTE(__T2Interrupt
)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltT3Interrupt
)   ? ABSOLUTE(__AltT3Interrupt
)   :
        (DEFINED(__T3Interrupt
)      ? ABSOLUTE(__T3Interrupt
)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltSPI1Interrupt
) ? ABSOLUTE(__AltSPI1Interrupt
) :
        (DEFINED(__SPI1Interrupt
)    ? ABSOLUTE(__SPI1Interrupt
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltU1RXInterrupt
) ? ABSOLUTE(__AltU1RXInterrupt
) :
        (DEFINED(__U1RXInterrupt
)    ? ABSOLUTE(__U1RXInterrupt
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltU1TXInterrupt
) ? ABSOLUTE(__AltU1TXInterrupt
) :
        (DEFINED(__U1TXInterrupt
)    ? ABSOLUTE(__U1TXInterrupt
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltADCInterrupt
)  ? ABSOLUTE(__AltADCInterrupt
)  :
        (DEFINED(__ADCInterrupt
)     ? ABSOLUTE(__ADCInterrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltNVMInterrupt
)  ? ABSOLUTE(__AltNVMInterrupt
)  :
        (DEFINED(__NVMInterrupt
)     ? ABSOLUTE(__NVMInterrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltSI2CInterrupt
) ? ABSOLUTE(__AltSI2CInterrupt
) :
        (DEFINED(__SI2CInterrupt
)    ? ABSOLUTE(__SI2CInterrupt
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltMI2CInterrupt
) ? ABSOLUTE(__AltMI2CInterrupt
) :
        (DEFINED(__MI2CInterrupt
)    ? ABSOLUTE(__MI2CInterrupt
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltCNInterrupt
)   ? ABSOLUTE(__AltCNInterrupt
)   :
        (DEFINED(__CNInterrupt
)      ? ABSOLUTE(__CNInterrupt
)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltINT1Interrupt
) ? ABSOLUTE(__AltINT1Interrupt
) :
        (DEFINED(__INT1Interrupt
)    ? ABSOLUTE(__INT1Interrupt
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltIC7Interrupt
)  ? ABSOLUTE(__AltIC7Interrupt
)  :
        (DEFINED(__IC7Interrupt
)     ? ABSOLUTE(__IC7Interrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltIC8Interrupt
)  ? ABSOLUTE(__AltIC8Interrupt
)  :
        (DEFINED(__IC8Interrupt
)     ? ABSOLUTE(__IC8Interrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltOC3Interrupt
)  ? ABSOLUTE(__AltOC3Interrupt
)  :
        (DEFINED(__OC3Interrupt
)     ? ABSOLUTE(__OC3Interrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltOC4Interrupt
)  ? ABSOLUTE(__AltOC4Interrupt
)  :
        (DEFINED(__OC4Interrupt
)     ? ABSOLUTE(__OC4Interrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltT4Interrupt
)   ? ABSOLUTE(__AltT4Interrupt
)   :
        (DEFINED(__T4Interrupt
)      ? ABSOLUTE(__T4Interrupt
)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltT5Interrupt
)   ? ABSOLUTE(__AltT5Interrupt
)   :
        (DEFINED(__T5Interrupt
)      ? ABSOLUTE(__T5Interrupt
)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltINT2Interrupt
) ? ABSOLUTE(__AltINT2Interrupt
) :
        (DEFINED(__INT2Interrupt
)    ? ABSOLUTE(__INT2Interrupt
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltU2RXInterrupt
) ? ABSOLUTE(__AltU2RXInterrupt
) :
        (DEFINED(__U2RXInterrupt
)    ? ABSOLUTE(__U2RXInterrupt
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltU2TXInterrupt
) ? ABSOLUTE(__AltU2TXInterrupt
) :
        (DEFINED(__U2TXInterrupt
)    ? ABSOLUTE(__U2TXInterrupt
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltSPI2Interrupt
) ? ABSOLUTE(__AltSPI2Interrupt
) :
        (DEFINED(__SPI2Interrupt
)    ? ABSOLUTE(__SPI2Interrupt
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltC1Interrupt
)   ? ABSOLUTE(__AltC1Interrupt
)   :
        (DEFINED(__C1Interrupt
)      ? ABSOLUTE(__C1Interrupt
)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltIC3Interrupt
)  ? ABSOLUTE(__AltIC3Interrupt
)  :
        (DEFINED(__IC3Interrupt
)     ? ABSOLUTE(__IC3Interrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltIC4Interrupt
)  ? ABSOLUTE(__AltIC4Interrupt
)  :
        (DEFINED(__IC4Interrupt
)     ? ABSOLUTE(__IC4Interrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltIC5Interrupt
)  ? ABSOLUTE(__AltIC5Interrupt
)  :
        (DEFINED(__IC5Interrupt
)     ? ABSOLUTE(__IC5Interrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltIC6Interrupt
)  ? ABSOLUTE(__AltIC6Interrupt
)  :
        (DEFINED(__IC6Interrupt
)     ? ABSOLUTE(__IC6Interrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltOC5Interrupt
)  ? ABSOLUTE(__AltOC5Interrupt
)  :
        (DEFINED(__OC5Interrupt
)     ? ABSOLUTE(__OC5Interrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltOC6Interrupt
)  ? ABSOLUTE(__AltOC6Interrupt
)  :
        (DEFINED(__OC6Interrupt
)     ? ABSOLUTE(__OC6Interrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltOC7Interrupt
)  ? ABSOLUTE(__AltOC7Interrupt
)  :
        (DEFINED(__OC7Interrupt
)     ? ABSOLUTE(__OC7Interrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltOC8Interrupt
)  ? ABSOLUTE(__AltOC8Interrupt
)  :
        (DEFINED(__OC8Interrupt
)     ? ABSOLUTE(__OC8Interrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltINT3Interrupt
) ? ABSOLUTE(__AltINT3Interrupt
) :
        (DEFINED(__INT3Interrupt
)    ? ABSOLUTE(__INT3Interrupt
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltINT4Interrupt
) ? ABSOLUTE(__AltINT4Interrupt
) :
        (DEFINED(__INT4Interrupt
)    ? ABSOLUTE(__INT4Interrupt
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltC2Interrupt
)   ? ABSOLUTE(__AltC2Interrupt
)   :
        (DEFINED(__C2Interrupt
)      ? ABSOLUTE(__C2Interrupt
)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltPWMInterrupt
)  ? ABSOLUTE(__AltPWMInterrupt
)  :
        (DEFINED(__PWMInterrupt
)     ? ABSOLUTE(__PWMInterrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltQEIInterrupt
)  ? ABSOLUTE(__AltQEIInterrupt
)  :
        (DEFINED(__QEIInterrupt
)     ? ABSOLUTE(__QEIInterrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltDCIInterrupt
)  ? ABSOLUTE(__AltDCIInterrupt
)  :
        (DEFINED(__DCIInterrupt
)     ? ABSOLUTE(__DCIInterrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltLVDInterrupt
)  ? ABSOLUTE(__AltLVDInterrupt
)  :
        (DEFINED(__LVDInterrupt
)     ? ABSOLUTE(__LVDInterrupt
)     :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltFLTAInterrupt
) ? ABSOLUTE(__AltFLTAInterrupt
) :
        (DEFINED(__FLTAInterrupt
)    ? ABSOLUTE(__FLTAInterrupt
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltFLTBInterrupt
) ? ABSOLUTE(__AltFLTBInterrupt
) :
        (DEFINED(__FLTBInterrupt
)    ? ABSOLUTE(__FLTBInterrupt
)    :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt45
)   ? ABSOLUTE(__AltInterrupt45
)   :
        (DEFINED(__Interrupt45
)      ? ABSOLUTE(__Interrupt45
)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt46
)   ? ABSOLUTE(__AltInterrupt46
)   :
        (DEFINED(__Interrupt46
)      ? ABSOLUTE(__Interrupt46
)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt47
)   ? ABSOLUTE(__AltInterrupt47
)   :
        (DEFINED(__Interrupt47
)      ? ABSOLUTE(__Interrupt47
)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt48
)   ? ABSOLUTE(__AltInterrupt48
)   :
        (DEFINED(__Interrupt48
)      ? ABSOLUTE(__Interrupt48
)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt49
)   ? ABSOLUTE(__AltInterrupt49
)   :
        (DEFINED(__Interrupt49
)      ? ABSOLUTE(__Interrupt49
)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt50
)   ? ABSOLUTE(__AltInterrupt50
)   :
        (DEFINED(__Interrupt50
)      ? ABSOLUTE(__Interrupt50
)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt51
)   ? ABSOLUTE(__AltInterrupt51
)   :
        (DEFINED(__Interrupt51
)      ? ABSOLUTE(__Interrupt51
)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt52
)   ? ABSOLUTE(__AltInterrupt52
)   :
        (DEFINED(__Interrupt52
)      ? ABSOLUTE(__Interrupt52
)      :
         ABSOLUTE(__DefaultInterrupt)));
    LONG(DEFINED(__AltInterrupt53
)   ? ABSOLUTE(__AltInterrupt53
)   :
        (DEFINED(__Interrupt53
)      ? ABSOLUTE(__Interrupt53
)      :
         ABSOLUTE(__DefaultInterrupt)));
  } >aivt

} /* SECTIONS */


/* File Description | Notes:
** =========================
** 1] This file maps special function register(SFR) names used in the datasheet
**   to memory locations in the PIC30Fxxxx device. The memory locations are
**    byte addresses. The PIC30Fxxxx is a family of byte addressable devices.
** 2] The register names used in this file are taken to match the
**    PIC30Fxxxx data sheets as closely as possible.
** 3] SFR address definitions are listed in the ascending order of memory
**    addresses and are grouped based on the module they belong to. For e.g.,
**    WREG10 is listed before ACCAL, and the Core SFRs are grouped
**    separately, prior to the Interrupt Controller SFRs or the General
**    Purpose Timer SFRs.
** 4] SFR names exactly match names in the device specific C "header" file
**    and the Assembly "include" file. Any changes to names in one of these
**    files, calls for similar changes in the other two.
**
* Revision History:
** =================
**-------------------------------------------------------------------------
**Rev:   Date:        Details:                                    Who:
**-------------------------------------------------------------------------
**1.0   11/29/01     Device linker provides from superset       h vasuki
**1.1   13 Dec 2001   Added PMD registers + some changes          -do-
**1.2   02 Dec 2002  CAN buffer correction                        -do-
**1.3   13 Feb 2003  ADCSSLBits/ADPCFGBits Address correction     -do-
**1.4   05 May 2003  Initial release of linker scripts for rev    -do-
**                   B silicon with changes in CAN section
**1.6   25 Nov 2003  CAN2 SFR bytes additions                   h vasuki
**1.6a  24 May 2004  Added OSCTUN register                        -do-
**1.7   30 Jul 2004  ADCBUF0-ADCBUFF Address Correction         h vasuki
**
**-------------------------------------------------------------------------
**
**
***************************************************************************/


/*=========================================================================
**       Register Definitions
** (Core and Peripheral Registers in Data Space)
**==========================================================================
**
**==========================================================================
**
**       dsPIC Core Register Definitions
**
**=========================================================================*/
 WREG0 = 0x0000;
_WREG0 = 0x0000;
 WREG1 = 0x0002;
_WREG1 = 0x0002;
 WREG2 = 0x0004;
_WREG2 = 0x0004;
 WREG3 = 0x0006;
_WREG3 = 0x0006;
 WREG4 = 0x0008;
_WREG4 = 0x0008;
 WREG5 = 0x000A;
_WREG5 = 0x000A;
 WREG6 = 0x000C;
_WREG6 = 0x000C;
 WREG7 = 0x000E;
_WREG7 = 0x000E;
 WREG8 = 0x0010;
_WREG8 = 0x0010;
 WREG9 = 0x0012;
_WREG9 = 0x0012;
 WREG10 = 0x0014;
_WREG10 = 0x0014;
 WREG11 = 0x0016;
_WREG11 = 0x0016;
 WREG12 = 0x0018;
_WREG12 = 0x0018;
 WREG13 = 0x001A;
_WREG13 = 0x001A;
 WREG14 = 0x001C;
_WREG14 = 0x001C;
 WREG15 = 0x001E;
_WREG15 = 0x001E;
 SPLIM = 0x0020;
_SPLIM = 0x0020;
 ACCAL = 0x0022;
_ACCAL = 0x0022;
 ACCAH = 0x0024;
_ACCAH = 0x0024;
 ACCAU = 0x0026;
_ACCAU = 0x0026;
 ACCBL = 0x0028;
_ACCBL = 0x0028;
 ACCBH = 0x002A;
_ACCBH = 0x002A;
 ACCBU = 0x002C;
_ACCBU = 0x002C;
 PCL = 0x002E;
_PCL = 0x002E;
 PCH = 0x0030;
_PCH = 0x0030;
 TBLPAG = 0x0032;
_TBLPAG = 0x0032;
 PSVPAG = 0x0034;
_PSVPAG = 0x0034;
 RCOUNT = 0x0036;
_RCOUNT = 0x0036;
 DCOUNT = 0x0038;
_DCOUNT = 0x0038;
 DOSTARTL = 0x003A;
_DOSTARTL = 0x003A;
 DOSTARTH = 0x003C;
_DOSTARTH = 0x003C;
 DOENDL = 0x003E;
_DOENDL = 0x003E;
 DOENDH = 0x0040;
_DOENDH = 0x0040;
 SR = 0x0042;
_SR = 0x0042;
 CORCON = 0x0044;
_CORCON = 0x0044;
 MODCON = 0x0046;
_MODCON = 0x0046;
 XMODSRT = 0x0048;
_XMODSRT = 0x0048;
 XMODEND = 0x004A;
_XMODEND = 0x004A;
 YMODSRT = 0x004C;
_YMODSRT = 0x004C;
 YMODEND = 0x004E;
_YMODEND = 0x004E;
 XBREV = 0x0050;
_XBREV = 0x0050;
 DISICNT = 0x0052;
_DISICNT = 0x0052;



/*==========================================================================
**
**           Interrupt Controller Register Definitions
**
==========================================================================*/
 INTCON1 = 0x0080;
_INTCON1 = 0x0080;
 INTCON2 = 0x0082;
_INTCON2 = 0x0082;
 IFS0 = 0x0084;
_IFS0 = 0x0084;
 IFS1 = 0x0086;
_IFS1 = 0x0086;
 IFS2 = 0x0088;
_IFS2 = 0x0088;
 IEC0 = 0x008C;
_IEC0 = 0x008C;
 IEC1 = 0x008E;
_IEC1 = 0x008E;
 IEC2 = 0x0090;
_IEC2 = 0x0090;
 IPC0 = 0x0094;
_IPC0 = 0x0094;
 IPC1 = 0x0096;
_IPC1 = 0x0096;
 IPC2 = 0x0098;
_IPC2 = 0x0098;
 IPC3 = 0x009A;
_IPC3 = 0x009A;
 IPC4 = 0x009C;
_IPC4 = 0x009C;
 IPC5 = 0x009E;
_IPC5 = 0x009E;
 IPC6 = 0x00A0;
_IPC6 = 0x00A0;
 IPC10 = 0x00A8;
_IPC10 = 0x00A8;


/*==========================================================================
**
**      Input Change Notification Module Register Definitions
**
===========================================================================*/
 CNEN1 = 0x00C0;
_CNEN1 = 0x00C0;
 CNPU1 = 0x00C4;
_CNPU1 = 0x00C4;



/*=========================================================================
**
**       Peripheral Register Definitions
**
===========================================================================*/
/*=========================================================================
**
**       Timer  Module Register Definitions
**
===========================================================================*/
/*--------------Timer 1 Module---------------------------------------------*/
 TMR1 = 0x0100;
_TMR1 = 0x0100;
 PR1 = 0x0102;
_PR1 = 0x0102;
 T1CON = 0x0104;
_T1CON = 0x0104;

/*--------------Timer2/3 Module--------------------------------------------*/
 TMR2 = 0x0106;
_TMR2 = 0x0106;
 TMR3HLD = 0x0108;
_TMR3HLD = 0x0108;
 TMR3 = 0x010A;
_TMR3 = 0x010A;
 PR2 = 0x010C;
_PR2 = 0x010C;
 PR3 = 0x010E;
_PR3 = 0x010E;
 T2CON = 0x0110;
_T2CON = 0x0110;
 T3CON = 0x0112;
_T3CON = 0x0112;



/*=========================================================================
**
**       Input Capture Module Register Definitions
**
=========================================================================*/
 IC1BUF = 0x0140;
_IC1BUF = 0x0140;
 IC1CON = 0x0142;
_IC1CON = 0x0142;
 IC2BUF = 0x0144;
_IC2BUF = 0x0144;
 IC2CON = 0x0146;
_IC2CON = 0x0146;



/*==========================================================================
**
**       Output Compare Module Register Definitions
**
===========================================================================*/
 OC1RS = 0x0180;
_OC1RS = 0x0180;
 OC1R = 0x0182;
_OC1R = 0x0182;
 OC1CON = 0x0184;
_OC1CON = 0x0184;
 OC2RS = 0x0186;
_OC2RS = 0x0186;
 OC2R = 0x0188;
_OC2R = 0x0188;
 OC2CON = 0x018A;
_OC2CON = 0x018A;



/*=========================================================================
**
**       Inter-Integrated Circuit(I2C) Module Register Definitions
**
==========================================================================*/
 I2CRCV = 0x0200;
_I2CRCV = 0x0200;
 I2CTRN = 0x0202;
_I2CTRN = 0x0202;
 I2CBRG = 0x0204;
_I2CBRG = 0x0204;
 I2CCON = 0x0206;
_I2CCON = 0x0206;
 I2CSTAT = 0x0208;
_I2CSTAT = 0x0208;
 I2CADD = 0x020A;
_I2CADD = 0x020A;

/*==========================================================================
**
**          Universal Asynchronous Receiver TransmitterUART Module
**                           Register Definitions
**
==========================================================================*/
/*------------------UART 1 Module-----------------------------------------*/
 U1MODE = 0x020C;
_U1MODE = 0x020C;
 U1STA = 0x020E;
_U1STA = 0x020E;
 U1TXREG = 0x0210;
_U1TXREG = 0x0210;
 U1RXREG = 0x0212;
_U1RXREG = 0x0212;
 U1BRG = 0x0214;
_U1BRG = 0x0214;

/*------------------UART 2 Module-----------------------------------------*/
 U2MODE = 0x0216;
_U2MODE = 0x0216;
 U2STA = 0x0218;
_U2STA = 0x0218;
 U2TXREG = 0x021A;
_U2TXREG = 0x021A;
 U2RXREG = 0x021C;
_U2RXREG = 0x021C;
 U2BRG = 0x021E;
_U2BRG = 0x021E;

/*==========================================================================
**
**       Serial Peripheral Interface(SPI) Module Register Definitions
**
==========================================================================*/
/*-----------------SPI 1 Module-------------------------------------------*/
 SPI1STAT = 0x0220;
_SPI1STAT = 0x0220;
 SPI1CON = 0x0222;
_SPI1CON = 0x0222;
 SPI1BUF = 0x0224;
_SPI1BUF = 0x0224;



/*==========================================================================
**
**     12-bit A/D Converter 100 Ksps Module Register Definitions
**
==========================================================================*/
 ADCBUF0 = 0x0280;
_ADCBUF0 = 0x0280;
 ADCBUF1 = 0x0282;
_ADCBUF1 = 0x0282;
 ADCBUF2 = 0x0284;
_ADCBUF2 = 0x0284;
 ADCBUF3 = 0x0286;
_ADCBUF3 = 0x0286;
 ADCBUF4 = 0x0288;
_ADCBUF4 = 0x0288;
 ADCBUF5 = 0x028A;
_ADCBUF5 = 0x028A;
 ADCBUF6 = 0x028C;
_ADCBUF6 = 0x028C;
 ADCBUF7 = 0x028E;
_ADCBUF7 = 0x028E;
 ADCBUF8 = 0x0290;
_ADCBUF8 = 0x0290;
 ADCBUF9 = 0x0292;
_ADCBUF9 = 0x0292;
 ADCBUFA = 0x0294;
_ADCBUFA = 0x0294;
 ADCBUFB = 0x0296;
_ADCBUFB = 0x0296;
 ADCBUFC = 0x0298;
_ADCBUFC = 0x0298;
 ADCBUFD = 0x029A;
_ADCBUFD = 0x029A;
 ADCBUFE = 0x029C;
_ADCBUFE = 0x029C;
 ADCBUFF = 0x029E;
_ADCBUFF = 0x029E;
 ADCON1 = 0x02A0;
_ADCON1 = 0x02A0;
 ADCON2 = 0x02A2;
_ADCON2 = 0x02A2;
 ADCON3 = 0x02A4;
_ADCON3 = 0x02A4;
 ADCHS = 0x02A6;
_ADCHS = 0x02A6;
 ADPCFG = 0x02A8;
_ADPCFG = 0x02A8;
 ADCSSL = 0x02AA;
_ADCSSL = 0x02AA;



/*==========================================================================
**
**    General Purpose I/O Port Register Definitions
**
==========================================================================*/
 TRISB = 0x02C6;
_TRISB = 0x02C6;
 PORTB = 0x02C8;
_PORTB = 0x02C8;
 LATB = 0x02CA;
_LATB = 0x02CA;

 TRISC = 0x02CC;
_TRISC = 0x02CC;
 PORTC = 0x02CE;
_PORTC = 0x02CE;
 LATC = 0x02D0;
_LATC = 0x02D0;

 TRISD = 0x02D2;
_TRISD = 0x02D2;
 PORTD = 0x02D4;
_PORTD = 0x02D4;
 LATD = 0x02D6;
_LATD = 0x02D6;

 TRISF = 0x02DE;
_TRISF = 0x02DE;
 PORTF = 0x02E0;
_PORTF = 0x02E0;
 LATF = 0x02E2;
_LATF = 0x02E2;



/*==========================================================================
**
**    System Integration Block Registers
**
==========================================================================*/
 RCON = 0x0740;
_RCON = 0x0740;
 OSCCON = 0x0742;
_OSCCON = 0x0742;
 OSCTUN = 0x744;
_OSCTUN = 0x744;

/*==========================================================================
**
**    Non Volatile Memory Registers
**
==========================================================================*/
 NVMCON = 0x0760;
_NVMCON = 0x0760;
 NVMADR = 0x0762;
_NVMADR = 0x0762;
 NVMADRU = 0x0764;
_NVMADRU = 0x0764;
 NVMKEY = 0x0766;
_NVMKEY = 0x0766;

/*==========================================================================
**
**   Peripheral Module Disable Registers
**
==========================================================================*/
 PMD1 = 0x0770;
_PMD1 = 0x0770;
 PMD2 = 0x0772;
_PMD2 = 0x0772;
 PMD3 = 0x0774;
_PMD3 = 0x0774;
/*
**End of SFR Definitions required for both C and Assembly files
*/


/*=========================================================================
**
**Start of Additional SFR Definitions that are required specifically
**for the C header file.
**
==========================================================================*/
 ACCA = 0x0022;
_ACCA = 0x0022;
 ACCB = 0x0028;
_ACCB = 0x0028;
 SRbits = 0x0042;
_SRbits = 0x0042;
 CORCONbits = 0x0044;
_CORCONbits = 0x0044;
 MODCONbits = 0x0046;
_MODCONbits = 0x0046;
 XBREVbits = 0x0050;
_XBREVbits = 0x0050;
 DISICNTbits = 0x0052;
_DISICNTbits = 0x0052;
 INTCON1bits = 0x0080;
_INTCON1bits = 0x0080;
 INTCON2bits = 0x0082;
_INTCON2bits = 0x0082;
 IFS0bits = 0x0084;
_IFS0bits = 0x0084;
 IFS1bits = 0x0086;
_IFS1bits = 0x0086;
 IFS2bits = 0x0088;
_IFS2bits = 0x0088;
 IEC0bits = 0x008C;
_IEC0bits = 0x008C;
 IEC1bits = 0x008E;
_IEC1bits = 0x008E;
 IEC2bits = 0x0090;
_IEC2bits = 0x0090;
 IPC0bits = 0x0094;
_IPC0bits = 0x0094;
 IPC1bits = 0x0096;
_IPC1bits = 0x0096;
 IPC2bits = 0x0098;
_IPC2bits = 0x0098;
 IPC3bits = 0x009A;
_IPC3bits = 0x009A;
 IPC4bits = 0x009C;
_IPC4bits = 0x009C;
 IPC5bits = 0x009E;
_IPC5bits = 0x009E;
 IPC6bits = 0x00A0;
_IPC6bits = 0x00A0;
 IPC10bits = 0x00A8;
_IPC10bits = 0x00A8;
 CNEN1bits = 0x00C0;
_CNEN1bits = 0x00C0;
 CNPU1bits = 0x00C4;
_CNPU1bits = 0x00C4;
 T1CONbits = 0x0104;
_T1CONbits = 0x0104;
 T2CONbits = 0x0110;
_T2CONbits = 0x0110;
 T3CONbits = 0x0112;
_T3CONbits = 0x0112;
 IC1CONbits = 0x0142;
_IC1CONbits = 0x0142;
 IC2CONbits = 0x0146;
_IC2CONbits = 0x0146;
 OC1CONbits = 0x0184;
_OC1CONbits = 0x0184;
 OC2CONbits = 0x018A;
_OC2CONbits = 0x018A;
 I2CRCVbits = 0x0200;
_I2CRCVbits = 0x0200;
 I2CTRNbits = 0x0202;
_I2CTRNbits = 0x0202;
 I2CBRGbits = 0x0204;
_I2CBRGbits = 0x0204;
 I2CCONbits = 0x0206;
_I2CCONbits = 0x0206;
 I2CSTATbits = 0x0208;
_I2CSTATbits = 0x0208;
 I2CADDbits = 0x020A;
_I2CADDbits = 0x020A;
 U1MODEbits = 0x020C;
_U1MODEbits = 0x020C;
 U1STAbits = 0x020E;
_U1STAbits = 0x020E;
 U1TXREGbits = 0x0210;
_U1TXREGbits = 0x0210;
 U1RXREGbits = 0x0212;
_U1RXREGbits = 0x0212;
 U2MODEbits = 0x0216;
_U2MODEbits = 0x0216;
 U2STAbits = 0x0218;
_U2STAbits = 0x0218;
 U2TXREGbits = 0x021A;
_U2TXREGbits = 0x021A;
 U2RXREGbits = 0x021C;
_U2RXREGbits = 0x021C;
 SPI1STATbits = 0x0220;
_SPI1STATbits = 0x0220;
 SPI1CONbits = 0x0222;
_SPI1CONbits = 0x0222;
 ADCON1bits = 0x02A0;
_ADCON1bits = 0x02A0;
 ADCON2bits = 0x02A2;
_ADCON2bits = 0x02A2;
 ADCON3bits = 0x02A4;
_ADCON3bits = 0x02A4;
 ADCHSbits = 0x02A6;
_ADCHSbits = 0x02A6;
 ADPCFGbits = 0x02A8;
_ADPCFGbits = 0x02A8;
 ADCSSLbits = 0x02AA;
_ADCSSLbits = 0x02AA;
 TRISBbits = 0x02C6;
_TRISBbits = 0x02C6;
 PORTBbits = 0x02C8;
_PORTBbits = 0x02C8;
 LATBbits = 0x02CA;
_LATBbits = 0x02CA;
 TRISCbits = 0x02CC;
_TRISCbits = 0x02CC;
 PORTCbits = 0x02CE;
_PORTCbits = 0x02CE;
 LATCbits = 0x02D0;
_LATCbits = 0x02D0;
 TRISDbits = 0x02D2;
_TRISDbits = 0x02D2;
 PORTDbits = 0x02D4;
_PORTDbits = 0x02D4;
 LATDbits = 0x02D6;
_LATDbits = 0x02D6;
 TRISFbits = 0x02DE;
_TRISFbits = 0x02DE;
 PORTFbits = 0x02E0;
_PORTFbits = 0x02E0;
 LATFbits = 0x02E2;
_LATFbits = 0x02E2;
 RCONbits = 0x0740;
_RCONbits = 0x0740;
 OSCCONbits = 0x742;
_OSCCONbits = 0x742;
 OSCTUNbits = 0x744;
_OSCTUNbits = 0x744;
 NVMCONbits = 0x0760;
_NVMCONbits = 0x0760;
 PMD1bits = 0x0770;
_PMD1bits = 0x0770;
 PMD2bits = 0x0772;
_PMD2bits = 0x0772;
 PMD3bits = 0x0774;
_PMD3bits = 0x0774;
/*
**end of SFR definitions required for C header
*/

/* SFR base address definitions for various peripherals */

 IC1 = 0x0140;
_IC1 = 0x0140;
 IC2 = 0x0144;
_IC2 = 0x0144;

 OC1 = 0x0180;
_OC1 = 0x0180;
 OC2 = 0x0186;
_OC2 = 0x0186;

 UART1 = 0x020C;
_UART1 = 0x020C;
 UART2 = 0x0216;
_UART2 = 0x0216;

 SPI1 = 0x0220;
_SPI1 = 0x0220;

/*=========================================================================
**end of SFR definitions required in Data Space
*========================================================================*/