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BANK 0 |
BANK 1 |
BANK 2 |
BANK 3 |
BANK 4 |
BANK 5 |
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0 |
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Core Registers |
Core Registers |
Core Registers |
Core Registers |
Core Registers |
Core Registers |
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B |
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C |
PORTA |
TRISA |
LATA |
ANSELA |
WPUA |
ODCONA |
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D |
PORTB |
TRISB |
LATB |
ANSELB |
WPUB |
ODCONB |
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E |
PORTC |
TRISC |
LATC |
ANSELC |
WPUC |
ODCONC |
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F |
-- |
-- |
-- |
-- |
-- |
-- |
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10 |
-- |
-- |
-- |
-- |
-- |
-- |
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11 |
PIR1 |
PIE1 |
CM1CON0 |
PMADRL |
SSP1BUF |
CCPRL |
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12 |
PIR2 |
PIE2 |
CM1CON1 |
PMADRH |
SSP1ADD |
CCPR1H |
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13 |
PIR3 |
PIE3 |
CM2CON0 |
PMDATL |
SSP1MSK |
CCP1CON |
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14 |
-- |
-- |
CM2CON1 |
PMDATH |
SSP1STAT |
-- |
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15 |
TMR0 |
OPTION_REG |
CMOUT |
PMCON1 |
SSP1CON |
-- |
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16 |
TMR1L |
PCON |
BORCON |
PMCON2 |
SSP1CON2 |
-- |
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17 |
TMR1H |
WDTCON |
FVRCON |
-- |
SSP1CON3 |
-- |
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18 |
T1CON |
OSCTUNE |
DAC1CON0 |
-- |
-- |
CCPR2L |
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19 |
T1GCON |
OSCCON |
DAC1CONN1 |
RC1REG |
-- |
CCPR2H |
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1A |
TMR2 |
OSCSTAT |
-- |
TX1REGG |
-- |
CCP2CON |
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1B |
PR2 |
ADRESL |
-- |
SP1BRGL |
-- |
-- |
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1C |
T2CON |
ADRESH |
ZCD1CON |
SP1BRGH |
-- |
-- |
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1D |
-- |
ADCON0 |
-- |
RC1STA |
-- |
-- |
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1E |
-- |
ADCON1 |
-- |
TXSTA |
-- |
CCPTMRS |
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1F |
-- |
ADCON2 |
-- |
BAUD1CON |
-- |
-- |
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20 |
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General |
General |
General |
General |
General |
General |
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Purpose |
Purpose |
Purpose |
Purpose |
Purpose |
Purpose |
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Registers |
Registers |
Registers |
Registers |
Registers |
Registers |
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80 Bytes |
80 Bytes |
80 Bytes |
80 Bytes |
80 Bytes |
80 Bytes |
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6F |
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70 |
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Common RAM |
Accesses |
Accesses |
Accesses |
Accesses |
Accesses |
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7F |
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